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Pullup Resistors on JTAG Inputs

Q: In the MPC106 User's Manual, Figure C-1 on page C-1 shows pullup resistors on

the JTAG inputs. The only other mention was found in the text of the signal description.

- What pins have pullup resistors on them?

- What value are the pullup resistors?

Currently, we have 13 pins that may be conﬁgured so that they will consume

static current. These pins can be grouped into 5 different groups.

Group 1 : - LSSD_MODE_, TCK, TRST_, TMS and TDI - These 5 pins will

continuously have the pull-up transistors being turned on.

Group 2 : - FOE_, RCS0_, DBG0_, and BCTL0_ - These pins are the power-up

conﬁg pins. The internal pullup will be activated when the 106 is in the hard

reset state (i.e During the period when the signal HRESET_ is asserted until

the internal sync'ed hard reset signal goes away.

Group 3 : - TV and BA0 - These 2 pins are functionally mux'ed for MP

environment. The internal pullup will be activated when the 106 is in the hard

reset state (same as Group 2 signals) and when the internal L2 controller is

disabled.

Group 4 : - ADS_ - Similar to Group 3 signals, the only different is that it

needs both internal and external L2 controller are being disabled before the

pull-up transistor will be turned off.

Group 5 : - LBCLAIM_ - This pin is functionally mux'ed for Eagle_mode for

backward compatibility with the 105. The internal pullup will be activeated

when the 106 is in the hard reset state (same as Group 2 signals) and when the

Eagle_mode is disabled.

Note : The pullup transistors in Group 2 to Group 5 are not observable

externally at the pin level. This means that when even when the pullup

transistor is being turned on, the pin signal may still stay at the Hi-Z state

if there is no other device driving that pin. The pulled state is only observed

by the 106 itself. Group 1 pull-up transistors are observable externally at

the pin level.