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Multiple 106’s on same PCI bus
Q. Can multiple MPC106 devices reside on the same PCI bus?
A.
Yes. However, external logic is required. The basic problem is that the MPC106's memory map
is not programmable. On POR it is placed in either MAP A or MAP B. Even placing two
MPC106's in different maps will not result in sufficient non-overlapping of spaces. This results in
both MPC106 devices attempting to service the same access presented on the PCI interfaces from
another PCI device. To resolve this issue, it is necessary to use some mechanism to prevent the
MPC106 devices from seeing the 'same' address. This may be accomplished by external logic
selecting which PPC processor node should be connected to the PCI system and enabling the
logic necessary to allow this node to 'see' the full address(ie. which node has been given the PCI
grant). By only allowing one of the other MPC10X devices to see A31 assert or FRAME assert
the other nodes can be kept from claiming that transaction. In effect, some central arbitration
mechanism (which can be accessed from the individual nodes) can be used as a semaphore to
allow or disallow that node from connecting itself to the PCI system. This solution will allow
multiple MPC10X processor complexes to reside on the same PCI bus as well as allow these mod-
ules to communicate to each other.
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