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LIST OF FIGURES

Figure 1-1

Figure 1-2

Figure 1-3

Figure 1-4

Figure 2-1

Figure 3-1

Figure 3-2

Figure 4-1

Figure 4-2

Figure 4-3

Figure 4-4

Figure 4-5

Figure 4-6

Figure 4-7

Figure 4-8

Figure 4-9

Figure 4-10

Figure 4-11

DSP56302EVM Component Layout. . . . . . . . . . . . . . . . . . . . . . . 1-6

Connecting the DSP56302EVM Cables. . . . . . . . . . . . . . . . . . . . 1-7

DSP56302EVM Test Sample Output—Fail . . . . . . . . . . . . . . . . 1-11

DSP56302EVM Test Sample Output—Pass . . . . . . . . . . . . . . . 1-12

DSP56302EVM Component Layout. . . . . . . . . . . . . . . . . . . . . . . 2-4

Development Process Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3

Example Debugger Window Display . . . . . . . . . . . . . . . . . . . . . 3-25

DSP56302EVM Component Layout. . . . . . . . . . . . . . . . . . . . . . . 4-4

DSP56302EVM Functional Block Diagram . . . . . . . . . . . . . . . . . 4-5

SRAM Connections to the DSP56302 . . . . . . . . . . . . . . . . . . . . . 4-6

Alternate Configurations for J9. . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6

Example Memory Map with the Unified External Memory . . . . . . 4-7

Address Attribute Register AAR0 . . . . . . . . . . . . . . . . . . . . . . . . . 4-8

Flash PEROM Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-9

Codec Analog Input/Output Diagram . . . . . . . . . . . . . . . . . . . . . 4-11

Codec Digital Interface Connections . . . . . . . . . . . . . . . . . . . . . 4-12

Codec Clock Generation Diagram . . . . . . . . . . . . . . . . . . . . . . . 4-13

RS-232 Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-14

DSP56302EVMUM/AD, Preliminary

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